Active Packaging (AP) is a device fabrication technique, intended to implement devices on a foreign (not necessarily even semiconductor) platform that perform better than conventionally fabricated devices on their natural semiconductor substrates. In many instances, AP enables the implementation of structures that cannot be realistically obtained in another way, such as those requiring lithography on opposite sides of a thin semiconductor film. The meaning of term AP is that certain essential fabrication steps (lithography, etching, metallization, etc.) are performed after the partially processed device or circuit is packaged onto a host platform.
One of the most important goals of the AP concept is the combination of dissimilar materials (notably, III-V compound semiconductors) with silicon integrated circuitry (IC) on a single Si substrate [ Luryi and Sze (1984, 1988) ]. This goal, now widely recognized as an important research direction in microelectronics, is shared by other emerging technologies, such as those based on heteroepitaxial and thin-film transfer techniques [ Doboeck and Borghs (1993) ]. At the same time, AP widens significantly the class of device structures that can be manufactured.
A number of other emerging technologies may be incorporated in the AP arsenal. Thus, some of the silicon-on-insulator techniques, such as those used in the very noteworthy recent ``smart-cut'' technology [ (Auberton-Herve 1996) ] may be used in the active packaging sense -- that is, for the purpose of adding integrated superior-performance devices and circuits by packaging them onto a pre-processed silicon IC platform. The AP technology is not intended to replace conventional devices, but rather to complement them. Devices to be implemented by AP are in a sense ``discrete'' as their number on the chip is relatively small compared to that of ULSI/TSI transistors. AP technology leads to development of hybrid chips with much higher performance and broader functions. This technology is compatible with and extends the current ``miniaturization'' trend in microelectronics as expressed by the celebrated Moore's Law. Whether or not the microelectronics industry will follow Moore's law in the next decade, active packaging will be an important step in future developments. The principle of active packaging has been illustrated [ (Luryi 1994a, 1996) ] in the instance of a heterostructure bipolar transistor (HBT) structure. Such a structure would reduce the parasitic capacitance between the base and the collector electrodes, enabling ultrafast operation with oscillation frequencies in the range of 300-400\ GHz and even higher. This in turn would open up the possibility of implementing on-chip millimeter-wave phased-array antenna systems; [ Luryi (1994a) ].
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