New technology of active packaging (AP) is proposed. It permits the implememtation of device structures that require lithography on opposite sides of a thin semiconductor crystal layer. A major goal of the AP technology is to integrate III-V devices with silicon integrated circuitry on a single substrate; the purpose, however, is not only to "teach the old dog new tricks" but also to greatly expand the assortment of tricks available. The concept is illustrated by describing a process for the fabrication of a collector-up InP heterojunction bipolar transistor, capable of oscillation in the frequency range of 300 to 400 GHz. An attractive application for this technology is the implementation of millimeter and submillimeter phased antenna arrays, in which beam steering is accomplished by amplitude modulation of array elements at a fixed phase difference. Focal plane antenna arrays on a silicon chip should have important applications in automobile collision avoidance and early warning systems, as well as satellite communication systems.
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