NOTE: I will post the input file "data.dat" in the future.

"READING AN INPUT FILE "

VHDL TUTORIAL

 

--This program reads the data.dat input file. It stores
--the read line characters (one by one) into a character
--variable. It processes line by line of the input file
--until EOF is encountered.
library std;
use std.textio.all;
entity read_file is end;--empty entity
architecture stimuli of read_file is
begin
	read_input_file:process
			variable inline:line;
			variable character_variable:character;
			variable end_of_line:boolean;
			file myfile:text is "data.dat";
	begin
		while not endfile(myfile) loop
			readline(myfile,inline);
			read(inline,character_variable,end_of_line);
			--end_of_line is EOLN boolean flag
			while end_of_line loop
				read(inline,character_variable,end_of_line);
			end loop;
	end loop;
	wait;	--Do nothing when finished
	end process read_input_file;
end stimuli;

 

  1. Type the previous VHDL source code and save it in the J:\ drive. The source code is an ASCII file and may be written via Notepad or Speed Wave's Source Code Editor (Start...Programs...Workview Office...Speed Wave...File...New).
    Note:         if you type your source code via Speed Wave, you must set up your Workview project before you launch SpeedWave. Refer to the section Setting the Project in the "Compiling VHDL files via SpeedWave" document. Ignore Speed Wave's warning that pops on the screen as you launch it, i.e. press the OK button.
  2. Compile the source code following the steps outlined in the "Compiling VHDL files via SpeedWave" document. Note that in SpeedWave the STD.LIB does not appear in the System Libs menu. Therefore, you do not add any VHDL simulation library to Workview's search order. This is step 2 of the "Configuring a Project" section of such document.
  3. Launch the VHDL Manager (select the Tools...VHDL Manager command at SpeedWave's window).
  4. Double click with the left mouse button on the only yellow folder below the Project Libraries list. The folder expands, and it reveals the read_file entity from the source code above. Select the read_file: Entity field, and then click on the Simulate Obj button. This loads the analyzed entity into SpeedWave. Loading the entity also opens the Navigator and opens the source code editor. After loading a model, the VHDL Manager will automatically close.
  5. Since the file in this tutorial does not contain any signals you do not have to set up watchpoints nor a waveform stream to view the results of your simulation. You may look at the variable contents directly on the right hand pane of the Navigator. You may tile the *.vhd and Schemles windows via Window...Tile Horizontally or Vertically for a better view of the simulation process.
  6. You may run or single step the simulation via the Simulate...Run or Step Into pull down menu. You MUST have an input file called data.dat in the J:\ drive for the simulation to work.

 

Note: For an online tutorial of VHDL via Workview launch from the Windows taskbar the following: Start...Programs...Workview Office...Workview Office Getting Started...Tutorials and Training...Accessing the Tutorials...SpeedWave/VHDL Tutorial.