Heteroepitaxy of lattice-mismatched materials

Invention of new chrystal growth techniques that permit the implementation of lattice-mismatched heteroepitaxial layers, notably -- but not exculsively -- on Si substrates. I believe this area of research is one of the most important for future directions in microelectronics.

As a result of my involvement with heteroepitaxial infrared detectors on Si chip I became an early proponent of heteroepitaxy of lattice-mismatched materials as a means of placing foreign semicinductors on Si substrates in the form of special purpose islands that endow Si IC's with new functions -- "teach new tricks to the old dog".
The most significant of my patents in this area, entitled "Dislocation-Free Epitaxial Layer on a Lattice-Mismatched Porous or otherwise Submicron Patterned Single Crystal Substrate", proposes epitaxial growth on laterally patterned substrates as a method of relieving stress and reducing the formation of misfit dislocations [ US Pat. 4,806,996 ]. This idea has found wide application.

Another related patent [ US Pat. 4,769,341 ] is entitled "Method of fabricating non-silicon materials on silicon substrate using an alloy of Sn and group IV semiconductors". It is concerned with the preparation of silicon substrates for the subsequent growth of materials with a larger lattice constant. Thus, an metastable silicon-tin alloy superlattice can be used as a substrate for a variety of foreign semiconductors, including Ge, GaAs, etc. This patent also discloses the possibility of obtaining an all-Column IV direct-gap semiconductor -- the germanium tin alloy Sn(x)Ge(1-x). This metastable SnGe alloy is predicted to become a direct-gap semiconductor for x larger than approximately 25% -- at which composition the alloy will be approximately lattice-matched to InP.

Key papers: 49, 61

Where the numbers refer to the attached list of Publications


In recent years, I have become interested in various packaging techniques to accomplish the same goal, namely endow the Si chip with new function. In particular, I proposed a new technology "Active Packaging" whose one of the most important goals is the combination of dissimilar materials (notably, III-V compound semiconductors) with silicon integrated circuitry (IC) on a single Si substrate -- in a way that widens significantly the class of device structures that can be manufactured.

Return to the [Research Topics] Home Page

Return to the [Serge Luryi's] Home Page

Return to the [Faculty] Home Page

Return to the [EE Department] home page


Serge Luryi, Serge.Luryi@sunysb.edu, +1.516.632.8420; Fax: +1.516.632.8494